近日,西安紫光國芯半導體股份有限公司(以下簡稱“西安紫光國芯”)在VLSI 2023技術與電路研討會上(2023 Symposium on VLSI Technology and Circuits)公開發表了技術論文——《基于小間距混合鍵合和mini-TSV的135GBps/Gbit 0.66 pJ/bit 嵌入式多層陣列 DRAM》(135 GBps/Gbit 0.66 pJ/bit Stacked Embedded DRAM with Multilayer Arrays by Fine Pitch H